archiv1

Home WHAT'S NEW INTERVIEWS MULTIMEDIA INDUSTRY VIEWS
   

Home
ABOUT
EDITORIAL BOARD
STEERING COMMITTEE
SPECIAL ISSUES
CALL FOR PAPERS
AUTHOR GUIDELINES
PAPER SUBMISSION
BACK ISSUES

SPONSORS

http://www.c-eda.org/templates/Ceda/images/CedaLogo.png

http://ewh.ieee.org/r5/central_texas/cas_ssc/cas_logo.jpghttp://www.tttc-events.org/tttc_website/images/TTTC_new.gif

EDITORIAL BOARD

 

Editor in Chief

 

Andr� Ivanov

Professor and Head of Electrical and Computer Engineering
The University of British Columbia

 

Electrical and Computer Engineering
The University of British Columbia
4030 - 2332 Main Mall
Vancouver BC V6T 1Z4
Canada

 

Tel : +1 (604) 822-2342
Fax : +1 (604) 822-5949 

 [email protected]

 


 

Editor in Chief Emeritus

 

Krishnendu Chakrabarty

 

Professor of Electrical and Computer Engineering
Duke University

 

Box 90291, 130 Hudson Hall,Durham, NC 27708
Tel : +1 (919) 660-5244
Fax : +1 (919) 660-5293
[email protected]

 

Associate Editor-In-Chief

 

Partha Pratim Pande

 

Professor, Washington State University

Boeing Centennial Chair in Computer Engineering

School of EECS, WSU

 

URL: www.eecs.wsu.edu/~pande

PO BOX 642752

Pullman, Washington 99164-2752

Phone 509-335-5223 Fax 509-335-3818

[email protected]

 

 

 

Associate Managing Editor

Dr. Prof. Helmut Graeb

Technical University of Munich
Department of Electrical Engineering and Information Technology
Institute for Electronic Design Automation - Arcisstr. 21 - 80333 Munich/Germany
Tel  +49.89.289.23679  -  Tel +49.151.21596771
http://www.eda.ei.tum.de/forschung/analog-eda/
[email protected]

 

 

 


 

 

 

TECHNICAL AREAS

 

Analog and Mixed-Signal
Test:
Haralampos Stratigopoulos,
TIMA Labs,
[email protected]
 


Biomedical Devices and Applications
Mohammad Sawan
Ecole Polytechnique de Montreal;
[email protected]



CAD for Low-Power Design
Massimo Poncino,
Politechnico di Torino;
[email protected]



Deep-Submicron Design, EDA,
and Technology:
Vivek De, Intel;
[email protected]

 


Defect-Based Test:

Adit Singh,
Auburn University;
[email protected]
 

 

DFM and Yield:

Anne E. Gattiker,
IBM;

[email protected]

 


Design-for-Testability
Rubin Parekhji, Teaxs Instruments (India);
[email protected]

 


Economics of Design
and Test:

Magdy Abadir,
Freescale Semiconductor;
[email protected]

 


Embedded Real-Time Systems:
Prabhat Mishra, University
of Florida;

[email protected]

 



Emerging Technologies (Bio & Nano):
Mircea Stan,
University of Virginia;
[email protected]

 

Cyber-Physical Systems:

Paul Bodgan, USC;
[email protected]

 


Hardware Trust and Secure
ICs:

Ramesh Karri,
NYU Polytechnic School of Engineering;
[email protected]

 

 


Interconnect Technologies:
Partha Pratim Pande, Washington State University;
[email protected]

 


Low Power Systems and Green Computing:
Anand Raghunathan,
Purdue University;
[email protected]



Memory Design and Test:
Cheng-Wen Wu, National Tsing Hua
University;

[email protected]
 

Said Hamdioui, TU Delft, Netherlands

[email protected]



MultiCore for High Performance and Ultra-Low Power:
David Atienza
EPFL;
[email protected]

 


Networks on Chip:
Umit Ogras,
Arizona State University;
[email protected]

 


Online Test and Fault Tolerance:
Qiang Xu,

Chinese University of
Hong Kong;

 [email protected]

 


Physical Design Automation:
Sung Kyu Lim, Georgia Tech;
[email protected]

 


Reconfigurable Embedded
Systems:

Jan Madsen,

Technical University of Denmark;
[email protected]

 


Silicon Debug:

Nicola Nicolici,
McMaster University;
[email protected]

 

 

SoC Testing:
Erik Jan Marinissen, IMEC;
[email protected]
 


Asynchronous Design:
Steven Nowick, Columbia University;
[email protected]




System-Level Design and Optimization
Petru Eles
Linkoping University;
[email protected]


Digital and Mixed-Signal Verification, Post Silicon Validation:
Shobha Vadusevan, UIUC;
[email protected]

 

Reliable, Secure, and Energy-Efficient Design:

Sanghamitra Roy, Utah State University;

[email protected]

 

DEPARTMENTS

 

Book Reviews:

 

Scott Davidson,

Oracle,

[email protected];

 

Grant Martin, Tensilica,

[email protected];

 

Igor Markov, University of Michigan,

[email protected]

 

CEDA Currents:

 

Rajesh K. Gupta,

University of California, San Diego;

[email protected]

 

Reports and Summaries:

 

Yervant

Zorian, Synopsys;

[email protected]

 

DATC Newsletter:

 

Joe Damore,

[email protected]

 

Interviews:

 

Erik Jan Marinissen, IMEC

[email protected]

 

The Last Byte:

 

Scott Davidson,

Oracle;

[email protected]

 

Perspectives:

 

Rajesh K. Gupta,

University of California, San Diego,

[email protected];

 

Yervant Zorian, Synopsys,

[email protected]

 

The Road Ahead:

 

Andrew Kahng, University of California,

San Diego; [email protected]

 

Roundtables:

 

David Yeh, SRC;

[email protected]

 

Standards (Design):

 

Stan Krolikoski, Cadence Design

Systems;

[email protected]

 

Standards (Test):

 

Bill Eklow, Cisco;

[email protected]

 

TTTC Newsletter:

 

Theo Theocharides, University of Cyprus;
[email protected]

 

Tutorials:

 

Dimitris Gizopoulos,

University of Athens;

[email protected]

General Column Editor:
 

Theo Theocharides, University of Cyprus;
[email protected]

 

D&T Alliance Program

 

DTAP chair:

Yervant Zorian, Synopsys;

[email protected]

 

Asia:

 

Hidetoshi Onodera, Kyoto

University;
[email protected]

 

DAC:

 

Andrew Kahng,

University of California, San Diego;

[email protected]

 

DATC:

 

Joe Damore;

[email protected]

 

DATE:

 

Ahmed Jerraya, CEA-LETI;

[email protected]

 

Europe:

 

Bernard Courtois, TIMA-CMP;

[email protected]

 

Latin America:

 

Ricardo Reis,

Universidade Federal do Rio

Grande do Sul;

[email protected]

 

TTTC:

 

Michael Nicolaidis

TIMA;

[email protected]

IEEE PRODUCTION STAFF

 

IEEE Periodicals/Magazines Department

 

445 Hoes Lane, Piscataway,

NJ 08854 USA

Phone: +1 732 562 3950,

Fax: +1 732 981 1855

www.ieee.org/magazines

 

Senior Managing Editor

 

William A. Colacchio,

[email protected]

 

Managing Editor

 

Jessica Barrague

[email protected]

 

Senior Managing Editor

 

Geraldine Krolin-Taylor,

[email protected]

 

Senior Art Director

 

Janet Dudar,

[email protected]

 

Assistant Art Director

 

Gail A. Schnitzer,

[email protected]

 

Production Coordinator

 

Theresa L. Smith,

[email protected]

 

Production Director

 

Peter M. Tuohy,

[email protected]

 

Advertising Production Manager

 

Felicia Spagnoli,

[email protected]

 

Editorial Director

 

Dawn Melley,

[email protected]

 

Staff Director, IEEE Publishing Operations

Fran Zappulla

[email protected]

 

Cover Design

Alex Torres

 

 

 

This site is maintained by:
IEEE D&T Information Editor

Theo Theocharides ([email protected]), University of Cyprus.