Call For Papers

The Symposium explores emerging trends and novel ideas and concepts covering a broad range of topics in the area of VLSI: from VLSI circuits, systems and design methods, to system level design and system-on-chip issues, to bringing VLSI methods to new areas and technologies like nano- and molecular devices, hardware security, etc. Future design methodologies are also one of the key topics at the Symposium, as well as new EDA tools to support them. Over three decades the Symposium has been a unique forum promoting multidisciplinary research and new visionary approaches in the area of VLSI, bringing together leading scientists and researchers from academia and industry. Selected high quality papers from ISVLSI 2018 will be considered for two Journal Special Issues: 1) IEEE Transactions on Nanotechnology (impact factor 2.485), and 2) IEEE Consumer Electronics Magazine (impact factor 1.153). The Symposium has established a reputation in bringing together well-known international scientists as invited speakers; the emphasis on high quality will continue at this and future editions of the Symposium.

Download PDF CFP

Paper Submission Deadline: February 2, 2018
Acceptance Notification: April 2, 2018
Submission of Final Version: May 12, 2018
Special Session Proposal Deadline: February 23, 2018

Contributions are sought in the following areas:

1. Analog and Mixed-Signal Circuits (AMS)

Analog/mixed-signal circuits, RF and communication circuits, adaptive circuits, interconnects, VLSI aspects of sensor and sensor network.

2. Computer-Aided Design and Verification (CAD)

Hardware/software co-design, logic and behavioral synthesis, simulation and formal verification, physical design, signal integrity, power and thermal analysis, statistical approaches.

3. Digital Circuits and FPGA based Designs (DCF)

Digital circuits, chaos/neural/fuzzy-logic circuits, high speed/low-power circuits, energy efficient circuits, near and sub-threshold circuits, memories, FPGA designs, FPGA based systems.

4. Emerging and Post-CMOS Technologies (EPT)

Nanotechnology, molecular electronics, quantum devices, optical computing, spin-based computing, biologically-inspired computing, CNT, SET, RTD, QCA, reversible logic, and CAD tools for emerging technology devices and circuits.

5. System Design and Security (SDS)

Structured and Custom Design methodologies, microprocessors/micro-architectures for performance and low power, embedded processors, analog/digital/mixed-signal systems, NoC, power and temperature aware designs, Hardware security, Cryptography, watermarking, and IP protection, TRNG and security oriented circuits, PUF circuits.

6. Testing, Reliability, and Fault-Tolerance (TRF)

Analog/digital/mixed-signal testing, design for testability and reliability, online testing techniques, static and dynamic defect- and fault-recoverability, and variation aware design.


The Symposium Program will include contributed papers and speakers invited by the Program Committee as well as a poster session. The keynotes, special sessions and Student Research Forum are planned as well. Authors are invited to submit full-length, original, unpublished papers. To enable blind review, the author list should be omitted from the main document. Initial submissions to the conference are limited to six pages in PDF format.