The IEEE Symposium on VLSI (ISVLSI) 2019 explores emerging trends, novel ideas and basic concepts covering a broad
range of VLSI-related topics: from VLSI systems, tools and design methods at different abstraction levels, to bringing VLSI
design and methods into new technologies such as nano and molecular devices and burgeoning application areas, such as
hardware security, and artificial intelligence. Future design methodologies are also one of the key topics at the symposium,
as well as new EDA tools to support them. Over three decades ISVLSI has been a unique forum promoting multidisciplinary
research and new visionary approaches in the area of VLSI, bringing together leading scientists and researchers from
academia and industry. The ISVLSI proceedings will be published by IEEE Computer Society Press. Selected papers from
past editions have been subsequently published in special issues of top archival journals. ISVLSI has a good reputation of
bringing together well-known international scientists as invited speaks. ISVLSI 2019 will continue the momentum and
carry forward these well-established trends for further growth of the symposium.
Contributions are sought in, but not limited to, the Following Tracks
1) Circuits, Reliability, and Fault-Tolerance (CRT): Analog/mixed-signal circuits design and testing, RF and
communication circuits, design for testability and reliability, adaptive circuits, interconnects, static and dynamic
defect-and fault-recoverability, and variation-aware design.
2) Computer-Aided Design and Verification (CAD): Hardware/software co-design, logic and behavioral synthesis,
simulation and formal verification, physical design, signal integrity, power and thermal analysis , statistical approaches.
3) Digital Circuits and FPGA based Designs (DCF): Digital circuits, chaos/neural/fuzzy-logic circuits, high-speed/low-power circuits, energy efficient circuits, near and sub-threshold circuits, memories, FPGA designs, FPGA based systems.
4) Emerging and Post-CMOS Technologies (EPT): Nanotechnology, molecular electronics, quantum devices, optical computing, spin-based computing, biologically-inspired computing, CNT, SET, RTD, QCA, reversible logic, and CAD tools for emerging technology devices and circuits.
5) System Design and Security (SDS): Structured and Custom Design methodologies, microprocessors/micro-architectures for performance and low power, embedded processors, analog/digital/mixed-signal systems, NoC, power and temperature aware designs, Hardware security, Cryptography, watermarking, and IP protection, TRNG and security oriented circuits, PUF circuits.
6) VLSI for Applied and Future Computing (AFC): Neuromorphic and brain-inspired computing, quantum computing, circuits and architectures for machine learning and artificial intelligence, methodologies for on-chip learning, deep learning acceleration techniques, applications for and use-cases of learning systems, sensor and sensor network, electronics for Internet of Things and smart medical devices.
The Symposium Program will include contributed papers and speakers invited by the Program Committee as well as a poster session. The keynotes, special sessions and Graduate Student Forum are planned as well. Authors are invited to submit full-length, original, unpublished papers. To enable blind review, the author list should be omitted from the main document.
Questions and Requests, please contact the
Submission: Authors are invited to submit full-length (6 pages
maximum), original, unpublished papers along with an abstract of at most
200 words. To enable blind review, the author list should be omitted
from the main document. Papers violating length and blind-review
criteria would be withdrawn from the review process. Previously
published papers or papers currently under review for other
conferences/journals should not be submitted and will not be considered
Paper Submission Site:
Paper Submission Deadline:
Acceptance Notification: April 21,
Submission of Final Version: May